Multiplexer

ABSTRACT

An electrical isolation barrier for use in a Data Access Arrangement uses a high frequency (HF) transformer  24  to provide isolation. An input signal, which may be analog or digital, is connected to a modulator. The analog output of the modulator is connected to the input of the HF transformer. The output of the HF transformer is connected to the input of a demodulator. Simple amplitude modulation can be used in the modulator to modulate the input signal to the frequency range of operation of the HF transformer. A simple low pass filter may be incorporated in the demodulator to remove harmonic distortion caused by the HF transformer. The output signal of the demodulator is substantially the same as input signal.

BACKGROUND OF THE INVENTION

[0001] The invention relates to isolation barriers for selectively isolating electrical circuits from each other. Such isolation barriers find use in modems and other devices, particularly those that require electrical isolation barriers between the devices and the public telephone network.

[0002] The Federal Communications Commission Part 68 has mandated that electrical connections to the public telephone network provide an isolation barrier between circuitry directly connected to that network (called the “line side” circuitry) and circuitry, such as a modem, that is directly connected to residential power (called the “system side” circuitry.) This isolation barrier must provide isolation such that a large magnitude voltage source of one thousand volts or fifteen hundred volts at 50 Hz or 60 Hz rms applied between various points on the device causes no more than 10 milliamperes leakage current.

[0003] The theory of isolation barriers is well known in the prior art. For example, U.S. Pat. No. 6,137,827 describes the theory and background of isolation barriers in great detail, incorporating by reference many patents illustrating isolation barriers and the devices that use them. Typically, electrical isolation is provided in the Data Access Arrangement (DAA) of the device. U.S. Pat. No. 6,137,827 and the patents incorporated therein by reference are each also incorporated herein by reference.

[0004] A conventional modem uses a voice band transformer in its DAA to provide The electrical isolation barrier. The transformer carries both the transmit signal and the receive signal. The separation of these two signals is done using a hybrid circuit of a type used to couple four-wire to two-wire circuits. Hybrid circuits are well known in the art and have four sets of terminals arranged in two pairs designed to produce high loss between two sets of terminals of a pair when the terminals of the other pair are suitably terminated. A modem using a voice band transformer DAA is known for its high reliability. However, the voice band transformer must handle low frequency (LF) signals from around 1004000 Hz.

[0005] The primary source of distortion in a transformer is non-linearity, which causes signal harmonics. For voice band signals, many of these harmonics fall within this same 100-4000 Hz band. Signal harmonics are characterized by unwanted energy at multiples of the desired signal frequencies. So, the signal frequency component at 500 Hz will cause noise at 1000 Hz, 1500 Hz, 2000 Hz, 2500 Hz, 3000 Hz, 3500 Hz, and 4000 Hz; all within the desired signal band. On the other hand, if the signal is modulated to a high frequency, say 1 Mhz, then the desired signal will be in the range of 0.996 MHz to 1.004 MHz. Now, the 500 Hz component is at 0.9995 Mhz and 1.0005 Mhz. The lowest harmonic is at 1.999 MHz, well above the highest signal frequency of 1.004 MHz. Therefore, a simple low-pass filter can be used to remove the harmonics, and no distortion will be caused in the desired signal. The linearity of the transformer is largely dependent on the magnetic inductance density in its magnetic core. The higher the magnetic inductance density, the less linear the transformer and the higher the energy of the signal harmonics. Therefore, a high linearity requirement is placed on the voice band transformer, which generally increases its size and cost.

[0006] In addition, a modem DAA using a voice band transformer typically uses a direct driver approach. In this approach, the transmitted signal from the modem driver proceeds through the transformer directly without further amplification. This direct driver approach requires the transformer to deliver high transmit power, further increasing the linearity requirement of the transformer. Because of these drawbacks a satisfactory voice band transformer for this type of electrical isolation is bulky and expensive.

[0007] There are several approaches to solve this problem. One approach is to use digital transformers or pulse transformers to replace the voice band transformer. However, a digital or pulse transformer is binary and therefore cannot carry two signals, the transmit signal and the receive signal, simultaneously. To allow both the transmit signal and the receive signal to be transmitted acceptably, one has to either use two pulse transformers, one for the transmit signal and the other for the receive signal, or resort to some sort of time division multiplexing method to carry the transmit signal and the receive signal alternately. However, this time division multiplexing method will destroy the self-clock ability of the signal. Therefore the clock signal has to be carried by a different means, typically using another transformer and adding further expense to the product. Another disadvantage of digital or pulse transformers is that they must be operated in their saturation range, requiring more power than similar transformers operated in their non-saturated (or “linear”) range.

[0008] Another approach is to use capacitive coupling. This approach uses one or more high voltage capacitors as The electrical isolation barriers because a capacitor typically exhibits good linearity. Therefore, separation of the transmit signal and the receive signal using a hybrid circuit is possible. On the other hand, a LF voice band signal, required in modems, requires a large capacitor. Such a high voltage large capacitor is expensive. Therefore, some means are used to modulate the signal to a higher frequency to reduce the capacitor requirement.

[0009] Yet another approach is to use high voltage optical couplers. Again, due to the typically highly non-linear property of this type of optical device, separate couplers must be used for the transmit signal and the receive signal. In a DM using optical coupling as The electrical isolation barrier, one can use a base band approach, or pass band approach. In the base band approach, the voice band signal is transmitted directly through the optical couplers. However, this has the drawback of requiring an elegant method to compensate for the non-linearity of the optical couplers. In the pass band approach, some means are used to modulate the signal to a higher frequency to reduce the impact of the non-linearity of the optical couplers, adding additional cost and complexity to the solution.

[0010] In addition to the transmit and receive voice band signals that modems of the type under discussion must transmit, there are control and status signals that also need to pass through The electrical isolation barrier. These latter signals are either carried through a separate isolation barrier, or multiplexed with the voice band signal and carried over the same isolation barrier.

SUMMARY OF THE INVENTION

[0011] We have observed that the linearity of a transformer largely depends on the magnetic inductance density in its magnetic core. The magnetic inductance density is directly proportional to the power delivered by the transformer, while inversely proportional to the volume of magnetic core, the number of turns of the transformer, and the frequency of the signal. In other words: the smaller the signal power, the larger the magnetic core, the more the coil turns, and the higher the signal frequency, the more linear the transformer. Or to achieve the same linearity, smaller signal power and higher frequency will result in a smaller magnetic core with fewer coil turns, leading to a smaller and less expensive transformer.

[0012] The current invention uses two approaches to achieve a low cost, reliable electrical isolation barrier using a single high frequency (HF) transformer. First, we can add an amplifier at the line side of The electrical isolation barrier to reduce the power requirement of the transformer.

[0013] Second, we use some means to modulate the signals to a higher frequency. At a higher frequency, any harmonics resulting from the transformer non-linearity are out of band. Simple means can then be used to remove any remaining distortion from the transformer non-linearity.

[0014] Unlike the digital or pulse transformer, the HF transformer is not driven to its saturation range. Therefore, less power is required to operate the invention than is required by conventional isolation means using digital or pulse transformers. Also, by operating the HF transformer in its linear range, it is possible for the transmit and receive signals to be carried simultaneously by a single transformer, with HF hybrid circuits to separate the two directions.

BRIEF DESCRIPTION OF THE DRAWINGS

[0015] The present invention can be better understood with reference to the drawings that are intended to illustrate only examples of embodiments of the invention and are not to be considered to limit the scope of the invention. The invention may well admit of equally effective additional embodiments without departing from its scope.

[0016]FIG. 1 illustrates a prior art voice band transformer based DAA circuit, including hybrid circuits for converting a four-wire circuit to a two-wire circuit.

[0017]FIG. 2 illustrates a block diagram of a DAA isolation barrier using an HF transformer according to the teachings of this invention.

[0018]FIG. 3 illustrates a DAA using a single HF transformer isolation barrier and hybrid circuits to convert four-wire circuits to two-wire circuits, where the CODEC is located entirely in the system side circuitry.

[0019]FIG. 4 illustrates a DAA using two HF transformer isolation barriers, one for TX and one for RX, where the CODEC is located entirely in the system side circuitry.

[0020]FIG. 5 illustrates a connection between a single HF transformer and two hybrid circuits useful in FIG. 3 or FIG. 6.

[0021]FIG. 6 illustrates a DAA using a single HF transformer isolation barrier and hybrid circuits to convert four-wire circuits to two-wire circuits, where the CODEC is distributed between the line side and the system side circuitry.

[0022]FIG. 7 illustrates a DAA using two HF transformer isolation barriers, one for TX and one for RX, where the CODEC is distributed between the line side and the system side circuitry.

[0023]FIG. 8 illustrates an example circuit for delivering power from the system side circuit to the line side circuit.

[0024]FIG. 9 illustrates a multiplexor useful in our invention.

DESCRIPTION OF PREFERRED EMBODIMENTS

[0025]FIG. 1 illustrates a prior art isolation barrier for use in a DAA. In that figure, a modem uses a voice band transformer 1 in its DAA to provide The electrical isolation barrier. The transformer carries both the transmit signal and the receive signal. The separation of these two signals is done using a hybrid circuit 2 of a type used to couple four-wire to two-wire circuits. Hybrid circuits are well known in the art and have four sets of terminals arranged in two pairs designed to produce high loss between two sets of terminals of a pair when the terminals of the other pair are suitably terminated. The hybrid circuit illustrated in FIG. 1 contains six impedance elements Z1-Z6, which are typically realized using resistors, capacitors, or some combination thereof. Other hybrid circuit configurations are also possible in a conventional transformer DAA.

[0026]FIG. 2 illustrates our basic invention. In that figure, an HF transformer 24 provides isolation. An input signal 21, which may be analog or digital, is connected to modulator 22. The analog output of modulator 22 is connected via lines 23 to the input of HF transformer 24. The output of HF transformer 24 is connected to the input of demodulator 26 via lines 25. The demodulator 26 generates an output signal 27, which may be analog or digital. No matter whether the input or output signals are digital or analog, the signal presented to the HF transformer 24 is analog in all embodiments of our invention. Simple amplitude modulation can be used in modulator 22 to modulate the input signal 21. This can be done by multiplying the input signal 21 by a clock signal. Similarly, the demodulator 26 may use a clock signal to multiply the signal from the HF transformer 24. The clock used by the demodulator 26 may be derived from the signal, or may be provided across a separate isolation barrier, as illustrated in FIG. 8. A simple low pass filter may be incorporated in the demodulator 26 to remove harmonic distortion caused by the HF transformer 24. The output signal 27 is substantially the same as input signal 21.

[0027]FIGS. 3 and 4 illustrate the use of the invention in a DAA application where the system-side circuitry contains the CODEC. First, the TX signal path in FIG. 3 will be described. Modem signals to be transmitted on the line are sent in digital form from the modem system to CODEC 33, which converts them to analog form and sends them to MUX 32. The Control Signal Generator 31 sends control signals in analog form to MUX 32. MUX 32 combines the two analog signals into one “base band” signal. In a preferred embodiment, the two signals are separated in frequency, and can be combined by a straightforward summing circuit. The combined signal is sent to the Modulator 36, which shifts the combined signal to a higher frequency, resulting in a “pass band” signal. The pass band signal enters the High Frequency Hybrid 38, which interfaces both the pass band TX and pass band RX signals to the High Frequency Transformer 39. On the line side of the transformer, the pass band TX signal passes through a second High Frequency Hybrid 42. The pass band TX signal is then sent to both the Clock Recovery 41, and the Demodulator 43. The Clock Recovery 41 locks the frequency of the line-side Demodulator 43 to that of the system-side Modulator 36. The Demodulator 43 shifts the frequency of the signal back to the original base band. This line-side base band signal is sent to the De-MUX 46, which separates the control signals from the TX line signal. In a preferred embodiment, this is done using filter banks. The control signals are sent to Control Circuits 45, and the TX line signal is sent to LF Hybrid 47, which interfaces the TX line signal and the RX line signal to the Line Interface 50. The Control Circuits 45 change the characteristics of the Line Interface 50 based on the control signals. The Line Interface 50 is connected to the telephone network.

[0028] Now, the RX signal path in FIG. 3 will be described. The analog RX line signal from the telephone network enters the Line Interface 50. From there, it is sent to the LF Hybrid 47, where it is separated from the TX line signal. The RX line signal is then sent to the MUX 48. The Status Signal Generator 49 sends status signals in analog form to the MUX 48. These signals are generated based on conditions in the Line Interface 50. MUX 48 combines the two analog signals into one base band signal. The combined signal is sent to the Modulator 44, which shifts the combined signal to a higher frequency, resulting in a pass band signal. The frequency of the Modulator 44 is locked to the frequency of the Demodulator 43. The pass band signal enters the High Frequency Hybrid 42, which interfaces both the pass band TX and pass band RX analog signals to the High Frequency Transformer 39. On the system side of the transformer, the pass band RX signal passes through a second High Frequency Hybrid 38. The pass band RX signal is then passed to the Demodulator 37, which shifts the frequency of the signal back to the base band. The base band signal is sent to the De-MUX 34, which separates the status signals from the RX line signal. The status signals are sent to the Status Circuits 35, which convert the signals into digital indications for the modem system. For example, these digital indications could be in the form of a ring indication, or bits in a status register. The RX line signal is sent to CODEC 33, which converts it into a digital signal for the modem system.

[0029] The operation of the DAA illustrated in FIG. 4 is very similar to that of FIG. 3. In this case, there are two HF transformers, one for the TX signal path and one for the RX signal path. Because of this separation, no High Frequency Hybrid circuits are required.

[0030]FIGS. 6 and 7 illustrate the use of the invention in a DAA application where the CODEC circuitry is distributed between the line-side and the system-side. The analog portion of the circuitry is located on the line-side, and the digital portion is located on the system-side. First, the TX signal path in FIG. 6 will be described. Modem signals to be transmitted on the line are sent in digital form to Sigma Delta CODEC Digital Portion 63, which converts them to over-sampled 1-bit digital form and sends them to MUX 62. The Control Signal Generator 61 sends control signals in digital form to MUX 62. MUX 62 combines the two digital signals into one digital signal. MUX 62 includes framing circuitry to facilitate synchronization in the line-side circuitry. In a preferred embodiment, the resulting digital signal is twice the bit rate of the oversampled 1-bit digital signal from the Sigma Delta CODEC Digital Portion 63. The combined digital signal is sent to the Modulator 66, which uses it to modulate a high-frequency analog signal, resulting in a pass band signal. This could be accomplished, for example, by multiplying the digital signal by an analog clock signal. The resulting signal enters the High Frequency Hybrid 68, which interfaces both the pass band TX and pass band RX signals to the High Frequency Transformer 69. On the line side of the transformer, the pass band TX signal passes through a second High Frequency Hybrid 72. The pass band TX signal is then sent to both the Clock Recovery 71, and the Demodulator 73. The Clock Recovery 71 locks the frequency of the line-side Demodulator 73 to that of the system-side Modulator 66. The Demodulator 73 recovers the bits of the combined digital signal. These bits are sent to the De-MUX 76, which separates the digital control signals from the oversampled 1-bit digital TX line signal. De-MUX 76 includes a frame detection means to correctly align the data. The digital control signals are sent to Control Circuits 75, and the oversampled 1-bit digital TX line signal is sent to the Sigma Delta CODEC Analog Portion and LF Hybrid 77, which converts the 1-bit oversampled digital signal to analog form, and interfaces the TX line signal and the RX line signal to the Line Interface 80. The Control Circuits 75 change the characteristics of the Line Interface 80 based on the control signals. The Line Interface 80 is connected to the telephone network.

[0031] Now, the RX signal path in FIG. 6 will be described. The analog RX line signal from the telephone network enters the Line Interface 80. From there, it is sent to the Sigma Delta CODEC Analog Portion and LF Hybrid 77, where it is separated from the TX line signal and converted to an oversampled 1-bit digital form. The oversampled 1-bit digital signal is then sent to the MUX 78. The Status Signal Generator 79 sends digital status signals to the MUX 78. These signals are generated based on conditions in the Line Interface 80. MUX 78 combines the two digital signals into one digital signal. MUX 78 includes framing circuitry to facilitate synchronization in the system-side circuitry. The combined signal is sent to the Modulator 74, which uses the digital signal to modulate a high-frequency analog signal, resulting in a pass band signal. The frequency of the Modulator 74 is locked to the frequency of the Demodulator 73. The pass band signal enters the High Frequency Hybrid 72, which interfaces both the pass band TX and pass band RX to the High Frequency Transformer 69. On the system side of the transformer, the pass band RX signal passes through a second High Frequency Hybrid 68. The pass band RX signal is then passed to the Demodulator 67, which recovers the bits of the combined digital signal. The digital signal is sent to the De-MUX 64, which separates the status bits from the oversampled 1-bit digital RX line signal. De-MUX 76 includes a frame detection means to correctly align the data. The status signals are sent to the Status Circuits 65, which convert the signals into digital indications for the modem system. For example, these digital indications could be in the form of a ring indication or bits in a status register. The oversampled 1-bit digital RX line signal is sent to Sigma Delta CODEC Digital Portion 63, which converts it into a digital signal for the modem system.

[0032] The operation of the DAA illustrated in FIG. 7 is very similar to that of FIG. 6. In this case, there are two HF transformers, one for the TX signal path and one for the RX signal path. Because of this separation, no High Frequency Hybrid circuits are required.

[0033] Logical Circuits for Control

[0034] Many integrated DAA's use integrated control signals for hook control, line impedance control, and the like. The state of these integrated control signals is normally programmed by the system side circuitry into and remembered by the line side circuitry. However, since the line side circuitry is normally powered by the line voltage, disruption of the line voltage, such as in the event of a line voltage reversal, may corrupt the state of the control signals. Conventional ways to protect against such corruption are either freezing the control signal state during such disruption, or providing power at least partially from the system side. In the current invention, a novel approach is used that remembers the control state information on the system side and frequently updates the control signals on the line side. This way, the line side circuitry just follows the control information on the system side, therefore logically forms separate control circuits. The line side circuitry only keeps the control state until the next update. The time between updates, which may be variable, is typically on the order of microseconds. During a disruption, the control state may be temporarily corrupted on the line side. However, subsequent updates will restore the control signals to the correct states. In the event the update stops, such as if the system side suddenly powers down, the line side circuitry will restore its control signals to a default state. This will prevent one drawback to the programmable schemes, where the line side circuitry remains in a wrong state when a disruption happens in the system side.

[0035] Multiplexing of Control/Status Signals with Line Signals

[0036] In order to reduce the number of HF transformer isolation barriers in a DAA using our invention, preferred embodiments use multiplexing schemes to combine the TX and RX line signals with control and/or status signals. Typically, control signals are multiplexed with the TX line signal, and status signals are multiplexed with the RX line signal. In DAA's such as those illustrated in FIGS. 3 and 4, an analog multiplexing scheme is used, typically a simple summing of signals with different frequency content. The demultiplexing is accomplished using filter banks. In the case of FIG. 3 where a single HF transformer is used with HF hybrid circuits, different frequencies are used for control and status, so that the echo from one side does not cause confusion for the other side.

[0037] In DAA's such as those illustrated in FIGS. 6 and 7, a digital multiplexing scheme is used by preferred embodiments. The digital multiplexing scheme can provide two functions: 1) a mechanism for framing and 2) a mechanism for Sigma Delta clock-recovery. In order to simplify clock-recovery, we force the bit rate of the multiplexed data to be an integer multiple of the Sigma Delta clock rate. In a preferred embodiment, the multiplexed bit rate is double the Sigma Delta bit rate. This means that half of the bits in the multiplexed data stream are available for control/status and framing. A simple way to assign the bits is to let every other bit be used for the digital signal, and assign the other bits for framing and control/status.

[0038] The 1-bit digital signals are assumed to be randomly distributed l's and 0's, with no framing required. Therefore, the framing bits are only needed to synchronize the status/control information. One framing method that can be used is to group the status/control information into N sets of n bits. For framing, each set of n bits is preceded by a 0, and the N sets are preceded by (n+1) 1's. The synchronization mechanism can look for (n+1) 1's followed by a 0 to detect the frame. This pattern can only occur for one alignment of the frame; there is no chance for the status/control information to mimic this pattern. It is possible for the 1-bit digital signals to mimic the pattern, but due to the random nature of those signals, the subsequent frames will not mimic the same pattern. Only the true frame sync bits will consistently match the pattern. The framing efficiency of this scheme can be calculated as n*N/[(n+1)*(N+1)].

[0039] To illustrate the multiplexing and framing concepts, consider that the frames are based on 32 bits. We choose n=3 and N=3, so the frame consists of 16 bits digital signal, 7 bits framing, and 9 bits status/control. The resulting bit stream can look like this: Bit 0 01 0 03 0 05 0 07 0 09 1 11 1 13 1 15 data 0 2 4 6 8 0 2 4 F₀ DD F₁ DD F₂ DD F₃ DD F₄ DD S₀ DD S₁ DD S₂ DD Bit 1 17 1 19 2 21 2 23 2 25 2 27 2 29 3 31 data 6 8 0 2 4 6 8 0 F₅ DD S₃ DD S₄ DD S₅ DD F₆ DD S₆ DD S₇ DD S₈ DD

[0040] For embodiments of the invention according to FIG. 6, it is desirable to have a different frame sync pattern for the TX and RX directions, chosen such that it is not possible for either pattern to occur in an echo signal. Since the High Frequency Hybrid circuits combine the TX and RX signals, the Demodulators 67 and 73 will see an echo of the signals from Modulators 66 and 74, respectively. The hybrid circuits reduce the echo levels, but cannot remove the echo completely. For example, in FIG. 6, De-MUX 64 should not have the possibility of locking to the combined digital signal from MUX 62; it should only be able to lock to the combined digital signal from MUX 78. It is also desirable to choose frame sync patterns such that the binary inverse of one direction's sync pattern cannot occur in the other direction. This is because the polarity of the echo signal is uncertain. There are many possible pairs of frame sync patterns that meet these requirements. One example is illustrated below: Bit 00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 data F0 D F1 D S0 D S1 D S2 D S3 D S4 D F2 D D D D D D D D D Bit 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 data F3 D S5 D S6 D F4 D S7 D F5 D S8 D F6 D D D D D D D D D

[0041] For these frame sync patterns, the synchronization mechanism must check all 7 frame bits for their correct alignment within the 32-bit frame.

[0042] The digital multiplexing scheme described above can be further understood by reference to FIG. 9. In this figure, a multiplexor 91 has two inputs: one for control or status bits 92, and one for a 1-bit digital signal 93. A first number of control or status bits enters the framer 94, which combines them with a fixed framing pattern having a second number of bits to from framer output 95. The framing pattern is chosen such that it uniquely indicates the correct framing alignment position of the framing output bits for all combinations of the status or control bits.

[0043] The framer output 95 and the 1-bit digital signal 93 enter the interleaver 96. The interleaver 96 takes a third number of bits from the framer output 95, where the third number is equal to the sum of the first and second numbers. The interleaver 96 interleaves the third number of bits with a proportional number of bits taken from the 1-bit digital input 93, to form a 1-bit digital output 97 having a fourth number of bits.

[0044] In a preferred embodiment, a DAA such as that illustrated in FIG. 6 uses two multiplexors, each functioning as illustrated in FIG. 9. It will be appreciated by those skilled in the art that the HF hybrid circuits in such a DAA will cause an echo of the modulator outputs to be seen by the demodulators on the same side of the HF transformer. In normal operation, the signal from the modulator on the other side of the HF transformer is stronger than the echo signal from the modulator on the same side of the HF transformer, so the demodulator decodes the correct bits. However, if the circuit on the other side of the HF transformer is not powered, the demodulator will only see the echo signal from the modulator on the same side of the HF transformer. In this case, it is possible for the demultiplexor to see the bits from the multiplexor on the same side of the HF transformer instead of the desired bits from the other side. For this reason, a preferred embodiment uses a different framing pattern for each multiplexor, such that each side's framing pattern prevents the multiplexor output from producing the other side's framing pattern for any combination of control or status bits. In addition, since the echo signal may be inverted, each framing pattern prevents the multiplexor output from producing the logical inverse of the other side's framing pattern.

[0045] Hybrid Circuits

[0046] High frequency hybrid circuits that can be used in FIGS. 3 and 6 are illustrated in FIG. 5. FIG. 5 shows two high frequency hybrid circuits 52 and 54, one on either side of a HF transformer 51. The hybrid circuit architecture is identical to that used for low-frequency hybrids in traditional voice band transformer based DAA's, as illustrated in FIG. 1. The main difference is that the values of the impedance elements Z7-Z12 and Z13-Z18 used in the high frequency hybrids will generally differ from the values of impedance elements Z1-Z6 used in the low frequency hybrid. The design of hybrid circuits is well known in the art.

[0047] Power for Line Side Circuitry

[0048] In a preferred embodiment, the line side circuitry derives its power entirely from the telephone network. However, our invention can also be used in configurations where the line side does not have a power supply such as the case of ADSL DAA, or the power supply is simply insufficient. In these cases, a supplementary power supply can be added to provide power to the line side circuitry. For example, power may be supplied from the system side to the line side using the circuit illustrated in FIG. 8. In this circuit, a clock/power signal generator 81 on the system side generates a periodic power signal on lines 82, which are connected to a transformer 83. On the line side, the output signal of the transformer on line 84 may be capacitively coupled to the clock input of the modulator and/or demodulator. The output signal of the transformer is further conditioned by a half-wave rectifier circuit, consisting of a diode 85 and a capacitor 86, to provide a stable power supply on output lines 87, which can be connected to power (Vcc) and ground (GND) inputs of the line side circuit. Power supply circuits such as illustrated in FIG. 8 are well known in the art.

[0049] While the foregoing has been with reference to particular embodiments of the invention, it will be appreciated by those skilled in the art that changes in these embodiments may be made without departing from the principles and spirit of the invention, the scope of which is defined by the appended claims. 

1-39 (cancelled)
 40. A multiplexor for use in a data access arrangement, comprising a first input for receiving a 1-bit digital signal; a second input for receiving a first number of digital status or control bits; a framing circuit for combining a second number of framing bits with the first number of digital status or control bits according to a first framing pattern to form a third number of framing output bits, wherein said third number is equal to the sum of the first and second numbers; and an interleaver which interleaves said third number of framing output bits with a proportional number of bits from the first input, forming a fourth number of multiplexor output bits; wherein said first framing pattern uniquely indicates the correct framing alignment position of said framing output bits for all combinations of said status or control bits.
 41. The multiplexor of claim 40, wherein said first framing pattern prevents the framing output bits from containing a second framing pattern for all possible combinations of said status or control bits, and all possible alignments of said framing output bits.
 42. The multiplexor of claim 41, wherein said first framing pattern prevents the framing output bits from containing the logical inverse of said second framing pattern for all possible combinations of said status or control bits, and all possible alignments of said framing output bits.
 43. A pair of multiplexors each located on opposite sides of an electrical isolation barrier, each of said multiplexors including a first input for receiving a 1-bit digital signal; a second input for receiving a first number of digital status or control bits; a framing circuit for combining a second number of framing bits with the first number of digital status or control bits according to a first framing pattern to form a third number of framing output bits, wherein said third number is equal to the sum of the first and second numbers; and an interleaver which interleaves said third number of framing output bits with a proportional number of bits from the first input, forming a fourth number of multiplexor output bits; wherein the first framing pattern of each multiplexor is equal to the second framing pattern of the other.
 44. A multiplexing method providing multiplexor output bits for use in a data access arrangement, comprising receiving a first 1-bit digital signal; receiving a first number of digital status or control bits; providing a second number of framing bits; providing a first framing pattern; combining the second number of framing bits with the first number of digital status or control bits according to the first framing pattern to form a third number of framing output bits, wherein said third number is equal to the sum of the first and second numbers; and interleaving said third number of framing output bits with a proportional number of bits from the first 1-bit digital signal to form a fourth number of multiplexor output bits; wherein said first framing pattern uniquely indicates the correct framing alignment position of the framing output bits for all combinations of said status or control bits.
 45. The method of claim 44, wherein said first framing pattern prevents the framing output bits from containing a second framing pattern for all possible combinations of said status or control bits, and all possible alignments of said framing output bits.
 46. The method of claim 45, wherein said first framing pattern prevents the third number of framing output bits from containing the logical inverse of said second framing pattern for all possible combinations of said status or control bits, and all possible alignments of said framing output bits.
 47. The method of claim 46, wherein said first framing pattern and said second framing pattern are interchangeable. 48-52 (cancelled) 